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清华大学微电子所
岗位类别
科研 / 新型半导体存储器团队芯片测试工程师01
招聘要求及职责
任职要求：
1.硕士及以上学历，或重点大学本科学历；按照学校对工程实验技术-试验发展系列的相关资质要求执行；
2.微电子或集成电路相关专业毕业；
3.有存储器或AI芯片测试背景；
4.具备英文文献的阅读和写作能力；
5.良好的沟通能力和合作精神。
岗位职责：
1.搭建存储器芯片的测试系统；
2.编写测试程序并测试芯片，分析测量数据，挖掘数据背后的物理规律，给出后续芯片迭代的优化方案。
所需专业：微电子
简历投递：电子邮箱：mmzhou@mail.tsinghua.edu.cn
Cadence
Principal Software Engineer
Job Responsibilities:
- Architect, design and develop high quality, secure, performant services
- Work closely with product owners and team to understand and elaborate requirements
- Work with team to troubleshoot code level problems quickly and efficiently
- Participate in code reviews to ensure new code conforms to highest standards
- Interact with internal and external customers to identify and resolve product defects
- Research and drive adoption of new technologies
Job Requirement:
- BS in Computer Science or related area with 5+ years of working experience or equivalent in EDA/CAD tool development
- 5+ years of C++/Qt/MFC experiences
- Strong professional experience developing scalable applications
- Both Linux and Windows development experiences are preferred
Software Engineer II
Position Description:
We are looking for talent and motivated engineers for our Voltus team. You will be responsible for the development and maintenance Web/Cloud platform for Cadence EDA and simulation products. You will be work with an excellent team in Shanghai and US in fast pace, to build new generation Web/Cloud products in interesting technics. Enjoy!
Position Requirements:
- MS or BS in Computer Science/Software engineering.
- Solid knowledges on data structure and algorithms.
- Encourage to be full stack: Familiar with Java/Java-script, HTML/CSS, Node.js
- Know front end engineering is a plus – modularization, bundling, performance, modern front-end frameworks.
- Strong desires to learn and explore new technologies and is able to demonstrate good analysis and problem-solving skills.
- Good English communication skill, both oral and written.
Lead Design Engineer
Position Description:
➢ Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.
➢ The candidate will have the opportunity to work on many varieties of challenging designs, i.e. low power and high speed design. The responsibility includes participating in or leading next generation PHY IP physical design, methodology and flow development.
Position Requirements:
➢ BS degree with 2+ years of applicable experience, MS degree with 1+ years of applicable experience in electrical engineering, microelectronics.
➢ Experienced with ASIC design flow, hierarchical physical design strategies, and methodologies and understand deep sub-micron technology issues.
➢ Solid knowledge on LP Design, static timing analysis, EM/IR-Drop/crosstalk analysis, physical verification, DFM.
➢ Successful track records of taping out complex chips is a plus.
➢ Automation and programming-minded, solid coding experience Tcl/Perl/Python.
➢ Innovative, self-motivated, able to work independently or as a team player, excellent verbal and written communication skills in English.
简历投递：https://cadence.wd1.myworkdayjobs.com/en-US/External_Careers/job/SHANGHAI/Design-Engineer-II_R30622
长江存储
Nand Controller Architect
Job Responsibility:
- Working with a team of ASIC, firmware, and software engineers to develop front-end designs for novel and innovative digital architectures, creating solutions that capture significant market opportunities.
- Working with internal partners to leverage YMTC’s inherent advantage in non-volatile memory to create systems with disruptive levels of performance, power and/or cost.
- Generating and driving the development and verification of innovative new intellectual property to improve the competitiveness of SoC solutions.
- Exploring and demonstrating feasibility of new intellectual property through system modeling and FPGA-based prototyping.
- Make proper strategy to work with 3rd party controller vendors, design optimized NFC/ECC/DSP IP for customized ASIC chip with strategic partner.
- Working with internal engineering teams and external customers to characterize new architectures, functions, and components.
- Contributing to the development and evolution of design flow for ASICs and FPGA prototyping.
- Establishing and maintaining strong technical relationships with third-party partners and vendors of ASIC intellectual property and development tools.
Requirement:
- A minimum of 8 years industry experience developing digital SOCs/ASICs.
- Experience developing digital designs and intellectual property for complex ASIC solutions.
- Experience developing the digital portions of memory controllers (NAND and/or SCM).
- A proven track record of innovative system product development and delivery.
- Experience working with industry standard processor and bus architectures.
- Experience with HDL design and simulation using Verilog, VHDL, SystemVerilog, and C.
- Experience performing ASIC and FPGA targeted synthesis using industry standard tools and methodologies.
- The ability to direct a physical design team with floor-planning and physical partitioning of a design.
- Experience with SoC ASIC emulation through FPGA-based prototyping platforms.
- Familiarity with system performance simulation and modeling.
- Experience establishing and maintaining working relationships with key industry partners and suppliers.
- A strong demonstrated commitment to teamwork and working with internal and external customers.
- Strong communication skills, with the ability to convey complex technical concepts to other design peers in verbal and written form.
Education:
- MS or BS in Electrical or Computer Engineering is required.
System Firmware Architect
职位描述：
- Define robust and scalable firmware architectures and work collaboratively with engineering teams to bring products to life.
- The architect will join the architecture team and grow that architecture team to broadly deliver the architectural specifications, plans and strategies needed to fuel system solution growing and diversifying product roadmap.
- The architect will work closely with architecture team, starting a product definition, ensuring both a strong firmware architecture and strong support for that architecture in the UFS/SSD ASIC upon which it will run.
- The architect needs to work closely with firmware development team to adopt the designed firmware architecture, keep improving the software structure and solve related issues.
- Build performance modeling to analyze and validate firmware and hardware architecture.
- Identify hardware and firmware performance bottlenecks. Work closely with architecture team in identification of solutions.
- Run and analyze workloads on simulators as well as work on developing and automating performance analysis infrastructure.
任职资格：
- Working expertise in Embedded System Firmware Development.
- Technical expertise in SoC architecture of memory and storage systems.
- Experience in firmware architecture for high volume Embedded System Firmware based products.
- In depth experience with software and firmware development methodologies.
- Practical experience in project management of firmware or software efforts.
- Knowledge of current state of the art development tools and their real world application.
- MSEE/MSCS or BSEE/BSCS with 5+ years of industry experience.
NAND Design validation Engineer
职位描述：
As IC Designer at YMTC's NAND design team, you will work in a highly innovative and motivated design team using state of the art memory technologies to develop Flash product.
You will participate in VLSI circuit design and verification in the circuit areas. As part of a multi-disciplinary team, you will participate in developing digital/analog mix-signal Design/Verification methodology for Flash products and design and implementation of mix-signal design verification environment as well. As an important part of responsibility, you will develop and verify design using digital and analog simulation tools and improve verification environment as well.
任职资格：
-Must possess good communication skills and ability to work well in a team and be initiative/responsible
-Familiar with Verilog or VHDL
-Basic understanding of CMOS circuit design
-Familiar with analog/digital or mix-signal simulator, ie. ncsim, XA etc
-Familiar with System Verilog and Assertion-based verification language is a plus
-Familiar with Unix platform, perl and tcl/python programming skill is a plus
-Previous work experience in Flash memory related fields is a plus
-English language skill in writing and speaking is a plus
BS or MS in Electrical Engineering is required
简历投递：http://ymtc.zhiye.com/social
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