Hi all i trying do transition from EL3 to EL2 exception ,but after ERET of EL3 mode it change the mode to EL2 , but as soon as when it will execute first instruction of EL2 , then It goes to Exception ...
This is happen for every secure to non secure transition in Armv8-A .
Please Guide if you know why this happen?
Thank you in advance.
Hi. For background reading I suggest you take a look at the "Boot: Bare Metal" guide linked to from this page:
developer.arm.com/.../learn-the-architecture
Specifically chapter 5.5, it talks about moving between Exception levels.
On to your specific question, there's a couple of things that could be going wrong. The value in ESR_EL3 when you re-enter EL3 should tell you what. Common problems:
SCR_EL3.RW
There are two things that control the Execution state (AArch32 or AArch64) of lower ELs. There's the value you're programming into the SPSR_EL3 before the ERET, and the RW bits (SCR_EL3.RW and HCR_EL2.RW). When entering EL2 from EL3, you need to make sure that SCR_EL3.RW is set to match what you're putting in the SPSR (i.e. they both say AArch64 or both say AArch32).
SCR_EL3.NS
On Armv8.0 and Armv8.2-A processors, EL2 only exists in Non-secure state. The SCR_EL3.NS bit controls whether lower ELs are Non-secure or Secure. So to enter EL2 you need to have configured the NS bit to be 1 (Non-secure)
These are other common problems, but don't quite fit with the symptoms you've described.
EL2 MMU registers
The SCTLR_EL2 register controls the MMU and caches for EL2 - it does NOT have a defined reset value. You need to make sure you've initialized it to a safe initial value before entering EL2 for the first time. Writing 0 to it is usually enough.
Address space
Again assuming an 8.0 or 8.2 processor. In Non-secure state you can only access Non-secure physical addresses. You need to make sure that the address you enter EL2 at is a NS physical address.
