棋子 · 2020年01月20日

Is during AXI unaligned transfer not all WDATA bits used?

Dear Forum,

Can you please confirm one thing.

When we have un-aligned transfer, do some of WDATA bits not used during that transfer?

For example, in the below unaligned transfer WDATA[7:0] are not used for the 1st transfer. Is my understanding right?

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极术小姐姐 · 2020年01月20日

Yes, your understanding is correct. The unaligned start address of 0x01 immediately tells you that data for address 0x0 is not being transferred, so nothing will be transferred on WDATA[7:0].

For INCREMENTING type bursts it is only this first transfer in the burst that doesn't use WDATA[7:0] as you see in the spec diagram, but for FIXED burst types the address remains constant for each transfer in the burst, so WDATA[7:0] wouldn't be used for any of the transfers,

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