棋子 · 2020年01月20日

When Wrapping happens in AXI?

Hi Forum,

I cannot understand when address is being wrapped in WRAP burst.In my example, the WRAP condition never happens in other words, during BURST operation address always remains small than wrap address.

From the spec, the wrapping happens when

        Address_N = Wrap_Boundary + (Number_Bytes × Burst_Length),

And every new transfer for WRAP is defined as:

            Address_N = Aligned_Address + (N – 1) × Number_Bytes

Now if we discuss this example:

Start_Address : 0x04 (d4):

awlen = 3 -> Burst_Length = 4

awsize = 1-> Number_Bytes=2

than we have:

Wrap Boundary = INT( d4/(24) ) (24) = INT(0.5) 8 = 1 *8 = 8

And Wrap Address: Address_N=Wrap_Boundary + (Number_Bytes × Burst_Length) = 8+(2*4) = 16

For the BURST:

Add1=4+ (1-1)*2 = 4

Add2=4+ (2-1)*2 = 6

Add3=4+ (3-1)*2 = 8

Add4=4+ (4-1)*2 = 10 --> our Burst_length is 4, so BURST is ended no need to WRAP the address, so wrap conditions not happened.

Can someone please help me understand what I missed here? And what is the new address value after WRAP?

Thanks

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极术小姐姐 · 2020年01月20日

In your example when working out the wrap boundary, INT(0.5) rounds down to 0, so then 0*8 is 0. This is the address the burst will wrap down to.

So when your burst reaches this address plus the number of bytes time the burst length (0+(2*4)), so 8, it wraps back to the "wrap boundary".

So your example sequence will be 4 then 6, and as the next increment 8 would match the maximum address boundary you instead wrap back to the wrap boundary, 0, and then increment to 2.

I must admit I've never liked these calculations. Simply think of a wrapping burst as accessing addresses within an aligned address range, aligned to the amount of data to be transferred, so length multiplied by width. When the burst address increments to the upper bound of this range, it wraps back to the lower bound and increments from there.

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