Is there any possibilities that if write transaction is in progress and if burst is not completed then HWRITE will be low after some clock. i.e. if HWRITE is high and size is 32 and burst is INCR8, ADDR is 0x30. Then it is possible that after 4 cycle HWRITE will be low means when address is 0x40, HWRITE will be low. and if possible than what is the slave respose and HREADY?
During bursts all master control signals (HWRITE, HSIZE, HBURST, HPROT, HMASTLOCK) MUST remain constant, so no, HWRITE could not go low after 4 transfers of an INCR8.
Unless of course, going back to your first question, early burst termination has occured.
As for the slave response in this early burst termination scenario, if it was the slave that cause the termination, HREADY/HRESP will be driven according to the non-OKAY response timings, and if it is a change in HGRANT, the slave will simply respond to whatever transfer is being requested of it. Note the the spec says slaves must be able to support early burst termination (see section 3.6.1 "Early burst termination").
